Analog / Mixed-Signal PLL Design Engineer, Senior - Cork, Ireland

Company:

QT Technologies Ireland Limited

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

About the role

Qualcomm’s Mixed-Signal IP high-speed clocking and Phased Locked Loop (PLL) design team is seeking Analog / Mixed-Signal design engineers to join our team in Cork, Ireland. The successful candidate will work on analog and mixed-signal integrated circuits for high-speed clocking IP for SoC and PHY level integration into Qualcomm's Mobile, Auto, IoT & Compute SoC products. The primary focus of the work is on low-power and low-voltage mixed-signal design with emphasis on advanced nanometer FinFET & Gate-All-Around (GAA) technology nodes.

The successful candidate will both design key circuit blocks and work closely with layout engineers to ensure the layout is fully optimized and complies with best analog layout practices. You will be directly involved in delivering next-generation PLL designs for Qualcomm SoCs and will be part of a large analog mixed-signal design team involved in architecture analysis and IP delivery in leading-edge process technology nodes at 3nm and beyond.

The role requires industry experience in transistor-level circuit implementations or highly relevant academic experience in a Masters’ or PhD program focused on full custom analog circuit design using nanometer CMOS technologies. In addition to Analog and Mixed-Signal circuit design expertise, good understanding of device physics, analog circuit custom layout, power distribution networks (PDN), mixed-signal design flow, SoC top-level integration and IC Design Tools are desired.

Responsibilities:

Architecture, design, and development of analog / mixed signal hard macros for the high-speed clocking IP Design team

Perform custom circuit design in the latest processes technologies and beyond to support the delivery of clocking (PLL/DLL/FLL) IP

Participate in internal customer requirements discussions.

Create design specifications.

Create behavioural models in Verilog.

Set-up, run and analyse circuit simulations.

Perform quality assurance procedures on developed hard macros.

Deliver hard macros and support customer integration and testing.

Perform silicon characterization analysis and prepare silicon verification reports.

Skills and Experience we would love to see:

Master’s or Ph.D. degree in Science, Engineering, or related field.

A minimum of 5-years of transistor level analog mixed-signal design experience, preferably in frequency synthesis design, high-speed wireline SerDes, DDR or other high speed applications

Experience in SPICE simulators and schematic capture tools

Experience in designing op-amps, bandgaps, differential amplifiers, VCO, PLL, DLL, FLL

Understanding of signal integrity in high-speed wireline design is preferred

Scripting to automate circuit design and verification work

Full-custom analog layout techniques and the ability to take a design and do all the layout extract verification and sign-off

Excellent communication skills and ability to contribute strongly within a high-performance team

Where you will be working

Cork has a proud reputation as Ireland's second largest economic engine and is now one of the Top 20 location choices in Europe with 39,000 people being employed by over 170 overseas companies.

There's a growing diversity in the region with people from many nationalities relocating to Cork, relishing the opportunity to work and live in a location that offers an excellent quality of life.

A gateway to Europe, Cork airport provides access to almost 50 international destinations including transatlantic air routes.

Equal Opportunities

We are an Equal Opportunity employer; all qualified applicants will receive consideration for employment without regard to race, colour, religion, sexual orientation, gender identity, national origin, disability, veteran status, or any protected classification.

What's on Offer

Apart from working in an open, relaxed and collaborative space, you will enjoy:

Salary, stock and performance related bonus

Maternity/Paternity Leave

Employee stock purchase scheme

Matching pension scheme

Education Assistance

Relocation and immigration support (if needed)

Life, Medical, Income and Travel Insurance

Subsidised memberships for physical and mental well-being

Bicycle purchase scheme

Employee run clubs, including, running, football, chess, badminton + many more

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

OR

Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.

OR

PhD in Science, Engineering, or related field.

*References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

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