GPU Design Verification Engineer - Qualcomm, Cambridge, United Kingdom

Company:

Qualcomm Technologies International Ltd

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

Architects, designs, implements, verifies, and optimizes performance and power of GPU cores. Responsible for verification of Graphics IP , and performing pre- and post-silicon verification to verify correctness and ensure performance and power goals are met.

The responsibilities of this role include:

Owning and executing on key independent tasks towards program requirements

Using verbal and written communication skills to convey basic, routine factual information about day-to-day activities to others who are fully knowledgeable in the subject area.

Working within prescribed timeline requirements and resource constraints

Applying independent creative thought to troubleshoot technical problems or deal with novel circumstances.

Research through available resources and engagement with various inter-disciplinary teams

Using deductive problem solving to solve moderately complex problems; most problems have defined processes of diagnosis/detection; some limited data analysis may be required.

PRINCIPAL DUTIES AND RESPONSIBILITIES:

Applies Graphics knowledge and experience to architect, design, implement, and verify the structure and performance of GPU hardware, drivers, features, applications, and tools.

Creates and maintains verification test benches and environments in System Verilog/UVM

Create and leverage advanced testing frameworks to generate and recreate real-world system integration conditions

Collaborates with Architecture, Software , Firmware, Design , Modeling, Emulation and Post-silicon validation teams to define and develop test methodology and content

Participate in GPU architecture, micro-architecture reviews

Collect, organize and execute various forms of system level test content including directed testcases, gaming benchmarks, standards compliance testsuites, and system level scenarios

Build automation for continue integration and testing based on latest GPU IP

Help collect and analyze test results using straightforward statistics and data predictions to track benchmarks and identify issues

Works with team members to understand and align on narrow scope of feature development and meet targets.

Write technical document and feature descriptions for straightforward projects under the direction of a supervisor

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

OR

Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.

OR

PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

PREFERRED QUALIFICATIONS:

5+ years Hardware Engineering, Software Engineering, Systems Engineering, or related work experience

Verification skills: Test planning, Scripting, Simulation, problem solving and debug.

System Verilog, UVM, Verilog or VHDL, C/C++ skills required.

Constrained random, Functional Coverage development, design debug experience required.

Exposure to Emulation/Prototyping Platforms (Veloce, Palladium, Zebu, FPGA)

Master's Degree in Electrical or Computer Engineering, Computer Science, or related field.

2+ years relevant GPU experience (either external or internal).

PREFERRED SKILLS

Experience in GPU based verification

Experience in system or sub-system level verification

Concurrency, Preemption, Stress testing frameworks

Testbench Architecture and Implementation

GFX API Exposure : Vulkan/DX11/DX12 Exposure

Scripting and automation skills (Python, Make, Airflow etc)

Embedded FW Development and Debugging

Benchmarking and Performance Analysis

Windows and/or Linux OS Kernel Architecture

C/C++, GNU Toolchain, Visual Studio

Formal verification - FPV and DPV experience is a plus

Experience with emulation/prototyping/hybrid build and execution flows (Veloce, Palladium, Zebu, Protium, HAPS, qemu)

Development of synthesizable transactors, monitors, scoreboards for emulation platforms

Embedded FW and/or Kernel level development and debugging skills (C/C++, Makefile, gdb, uboot, uefi, kernel-mode drivers)

*References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.

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