Verified by our engine · Posted 3mo ago
- Posted
- 3mo ago
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- Salary
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- Visa sponsorship
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Posted on 4 August 2026
Work model not stated
Salary range not shared by the company
Visa sponsorship details unknown
Listing history First seen 60+ days ago
- First seen 60+ days ago. We first saw this listing on 10 Sept 2026. That is when we found it, not necessarily when it was posted.
We are looking for a Senior Design Verification Engineer to drive ASIC functional verification for Cisco Silicon One chips. Collaborate with global teams on system-level verification and support various development stages. Ideal for candidates with advanced SystemVerilog/UVM expertise and significant experience in digital logic verification.
About Cisco
Cisco's European roles are spread thin across Galway, Kraków, London and a string of Nordic and DACH offices. The breadth reflects Cisco's own sprawl — networking, security and collaboration are different businesses under one badge — so filter by team before assuming a role is close to the hardware.
